Charge pump circuits are used to provide a voltage that is higher than the voltage of a power supply or to reverse its polarity. Charge pumps are commonly used in memory devices, such as a flash memory and Electrically Erasable Programmable Read-Only Memory (EEPROM). Charge pump circuits are also used in other devices to increase dynamic range and simplify design.
One common charge pump design is a Dickson charge pump. FIG. 1 shows an example of a Dickson charge pump 100. Each stage of the Dickson charge pump 100 is made of a capacitor and a n-channel metal-oxide-semiconductor field-effect (NMOS) transistor N1, N2, N3, N4, or N5 acting as a diode. The transistors have their bulk connected to the ground. Each of the NMOS transistors N2, N3, N4, N5 connects a drain terminal and gate terminal together to a stage capacitor C1, C2, C3, C4, respectively. As shown, the source terminals of the NMOS transistors N1, N2, N3, N4 are connected to the stage capacitor of the next stage. Two inverted phase clock Φ and Φ′ are used. The maximum gain per stage is VDD-VT, where VT is the threshold voltage of the NMOS devices.
As the supply voltage VDD decreases with advanced technologies, the pumping efficiency of such charge pump is decreased. Moreover, the body effect increases the threshold voltage of the NMOS devices. As the drop between the NMOS source and bulk increases, the number of stages that can be cascaded is limited. Another drawback of such structure is that thick oxide, high voltage transistors are necessary to sustain a large drop between the gate and the bulk in a reliable way. This prevents the design of such a circuit using thin oxide, low voltage standard devices that can sustain a maximum drop of VDD.